Bangladesh does not make chips, but a small number of Bangladeshi engineers design parts of them for companies abroad, and Ulkasemi — one of the few local firms in that business — has decided the bottleneck is training. Its new Ulkasemi VLSI Training Institute has opened in Niketan, Dhaka, with roughly 50 students across two specialised courses, which the company calls the country's largest semiconductor training centre.
The pipeline the course tracks are named after
The curriculum is organised the way a chip-design company is, with separate tracks for RTL, design verification, physical design, layout and design for testability. Those names mean nothing to most readers, and they are stages of one pipeline in a fixed order. Knowing the order makes the job market legible.
Specification decides what the chip must do. RTL — register transfer level — is where an engineer describes the logic in a hardware description language: not drawing circuits, but writing what happens on each clock tick, in a language that looks like code and compiles to hardware.
Verification then proves the description is correct, by building an environment that drives the design with millions of scenarios and checks the result against what was specified.
Synthesis converts the verified description into actual logic gates for a particular manufacturing process. Physical design places those gates on the silicon and routes the wiring between them, under constraints on timing, power and heat — a packing and optimisation problem at a scale no human does by hand. Layout handles the geometry of the structures themselves, and design for testability adds circuitry whose only job is to let a finished chip be tested, because a chip that cannot be tested cannot be sold.
The two courses running now are IC mask design and IC physical design; analogue design and verification are planned next.
The track nobody applies for is where the jobs are
Here is the piece of career information worth more than the rest of this article.
On a typical chip project there are more verification engineers than design engineers, often substantially more. The reason is asymmetry: writing a description of what a block should do is bounded work, while proving it does that — under every combination of inputs, timings and corner cases, when a mistake found after manufacturing costs millions and months — is effectively unbounded. Teams spend more effort checking than creating.
Students overwhelmingly want to do design, because design sounds like the creative part. Verification is where the hiring is, it pays comparably, and it is a far faster route into the industry for someone without a track record. Anyone choosing between these tracks on the basis of which sounds better is choosing on the wrong axis.
Why tool access is the actual barrier
The courses run around 80–90 per cent hands-on with industry-standard EDA tools, typically three months at five days a week — about 240 hours, up to 480 for some tracks — taught by working engineers, with capacity for 150 students at a time.
The emphasis on tools is not a selling point; it is the entire proposition. Electronic design automation software is what chip designers work in all day, and it is licensed at a cost per seat per year that runs to tens of thousands of dollars. That single fact explains the shape of the problem: a university can teach digital logic perfectly well on a whiteboard and cannot put a student in front of the software they will be hired to operate.
So the gap between a competent EEE graduate and an employable chip designer is rarely theory. It is hours on tools, plus the habits that come with them — how a real project is organised, what a design review consists of, what a constraint file is and why it is where the problems hide. An institution whose main asset is licensed tool access and engineers who use it daily is filling exactly that hole, and it is a hole money fills rather than talent.
What the work actually is
Worth being plain about, because "chip designer" suggests something different from the job.
Bangladesh's firms in this business operate in design services: contracted to deliver specific blocks or stages of somebody else's chip, for a fabless company abroad that owns the product. The engineer works on a component of a design they may never see in finished form, under the client's methodology, frequently on the client's infrastructure because the intellectual property cannot leave their network.
That has two consequences worth knowing before choosing the career. The work is real engineering at the same technical level as the client's own teams — this is not a back-office tier. And it is rarely attributable: you cannot point at a shipped product and say that part is mine, which matters for how a CV is built and is a reason to keep careful private records of what you did.
The IP-security constraint also explains why some of this work cannot simply be done remotely from anywhere, and why a local office with the right access controls is itself an asset.
Who should apply
The natural candidates are final-year and recent EEE, CSE and ECE graduates who want hardware rather than software, and mid-career embedded or FPGA engineers moving toward ASIC work. The FPGA route is the most underrated: the languages and much of the thinking carry over directly, so an engineer with real FPGA experience starts closer to employable than a fresh graduate does.
The realistic caution is unchanged. The domestic job pool is small — a handful of firms serving foreign fabless companies — so a cohort of 50 is a meaningful fraction of local demand. The larger prize is remote and overseas work, where a certified, tool-fluent designer from Dhaka competes on cost with Bengaluru and Hanoi, both of which have a twenty-year head start and deep local ecosystems.
Which is the honest frame for the whole enterprise. Training 150 people at a time does not create a semiconductor industry; it creates the labour supply one would need, which has to exist first and is useless on its own. The question this institute raises and cannot answer is whether anything will be built here for them to work on, or whether its graduates become an export.
